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Features
? Permanent and Reversible Software Write Protection for the First-half of the Array
– Software Procedure to Verify Write Protect Status
? Hardware Write Protection for the Entire Array
? Low-voltage and Standard-voltage Operation
?
?
?
?
?
?
?
?
?
– 1.7 (V CC = 1.7V to 3.6V)
Internally Organized 256 x 8
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
100 kHz (1.7V) and 400 kHz (2.7V and 3.6V) Compatibility
16-byte Page Write Modes
Partial Page Writes Are Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
– Endurance: 1 Million Write Cycles
Two-wire Serial
EEPROM
with Permanent
– Data Retention: 100 Years
? 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 8-lead TSSOP, and 8-ball
dBGA2 Packages
Description
The AT34C02B provides 2048 bits of serial electrically-erasable and programmable
read only memory (EEPROM) organized as 256 words of 8 bits each. The first-half of
the device incorporates a permanent and a reversible software write protection feature
while hardware write protection for the entire array is available via an external pin.
Once the permanent software write protection is enabled, by sending a special com-
mand to the device, it cannot be reversed. However, the reversible software write
protection is enabled and can be reversed by sending a special command. The hard-
and Reversible
Software Write
Protect
2K (256 x 8)
AT34C02B
ware write protection is controlled with the WP pin and can be used to protect the
entire array, whether or not the software write protection has been enabled. This
allows the user to protect none, first-half, or all of the array depending on the applica-
tion. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operations are essential. The AT34C02B is avail-
able in space saving 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3) , 8-lead
TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial interface.
It is available in 1.7V (1.7V to 3.6V).
Note:
Not recommended for new
design; please refer to
AT34C02C datasheet.
Table 1. Pin Configurations
8-ball dBGA2
8-lead Ultra Thin Mini-MAP
Pin Name
A0 - A2
SDA
Function
Address Inputs
Serial Data
VCC
WP
SCL
SDA
8
7
6
5
1
2
3
4
A0
A1
A2
GND
VCC
WP
SCL
SDA
8
7
6
5
1
2
3
4
A0
A1
A2
GND
SCL
WP
Serial Clock Input
Write Protect
8-lead TSSOP
Bottom View
8-lead SOIC
(MLP 2x3)
Bottom View
A0
A1
A2
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
Rev. 3417E–SEEPR–1/07
1
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